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MIC2551A-2.5
Micrel, Inc.
MIC2551A-2.5
USB Transceiver
General Description
The MIC2551A is a single chip transceiver that complies with the physical layer specifications of the Universal Serial Bus (USB) 2.0. It supports both full speed (12Mbps) and low speed (1.5Mbps) operation and introduces superior edge rate control, producing crisper eye diagrams. This in turn, eases the task of passing USB compliance testing. A unique, patented, dual supply voltage operation allows the MIC2551A to reference the system I/F I/O signals to a supply voltage down to 1.6V while independently powered by the USB VBUS. This reduces system operating current and allows the system to operate at its core voltage without additional buffering logic. MIC2551A-2.5 is differentiated from MIC2551A by a smaller space saving MLFTM package (2.5mm x 2.5mm) and 15kV ESD protection which eliminates the need for separate ESD protection devices on the D+, D- data lines. Data sheets and support documentation can be found on Micrel's web site at www.micrel.com.
Features
* 15kV ESD protection on VBUS, D+ and D* Smaller 2.5mm x 2.5mm MLFTM package * USB 1.1 and 2.0 compliant transceiver (full speed 12Mbs and low speed - 1.5Mbps) operation * Separate I/O supply with operation down to 1.6V * Integrated speed select termination supply * Very-low power consumption to meet USB suspend current requirements * No power supply sequencing requirements * Software controlled enumeration
Applications
* * * * PDAs Palmtops Cell phones PC peripherals
Ordering Information
Part Number MIC2551AYML25 Junction Temp. Range -40C to +85C Package - Pb Free 2.5mm x 2.5mm MLFTM
Typical Application
MIC2551A Transceiver V I/O VIF CON OE# RCV VP VM SPD GND SUS GND VTRM VPU VBUS D+ D- 1.5 k 20 1% 20 1% 1.0F
VBUS
D+ D- 10F GND USB Port
USB Controller
Typical Application Circuit
MicroLeadFrame and MLF are trademarks of Amkor Technology. Micrel, Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
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Micrel, Inc.
Pin Configuration
VBUS SPD VPU VIF
14 13
12
11 10 9 8
RCV VP VM
1 2 3 4 5 6 7
VTRM D+ D-
OE#
GND
14-Pin MLFTM (ML)
CON
SUS
Pin Description
Pin Number 1 2 3 4 5 6 7 8 9 10 11 Pin Name RCV VP VM CON GND SUS OE# DD+ VTRM VPU I I I/O O O I/O O I/O I/O I Pin Description Receive Data: Output for USB differential data. If OE# = 1, VP = Receive output (+) If OE# = 0, VP = Driver input (+). If OE# = 1, VM = Receive output (-) If OE# = 0, VM = Driver input (-). CONNECT (Input): Controls state of VPU. Refer to VPU pin description for detail. Ground Reference. Suspend: Active-High. Turns off internal circuits to reduce supply current. Output Enable: Active-Low. Enables the transceiver to transmit data onto the bus. When inactive, the trasceiver is in the receive mode. Differential data lines conforming to the USB standard. 3.3V Reference Supply Output: Requires a minimum 0.1F decoupling capacitor for stability. A 1F capacitor is recommended. Pull-up Supply Voltage Output: Used to connect 1.5k pull-up speed detect resistor. If CON = 1, VPU is high impedance. If CON = 0, VPU = 3.3V. USB Bus Supply Voltage: Used to power USB transceiver and internal circuitry. System Interface Supply Voltage: Used to provide reference supply voltage for system I/O interface signaling. Edge Rate Control: A logic HIGH operates at edge rates for "full speed" operation. A logic LOW operates edge rates for "low-speed" operation.
12 13 14
VBUS VIF SPD
I I I
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Micrel, Inc.
SUS 0 0 1 1
OE# 0 1 0 1
D+, D- Driving Receiving Hi-Z Hi-Z
RCV Active Active 0 0
VP/VM Active Active Not Active Active
Function Normal transmit mode. Normal receive mode. Low power state. Receiving during suspend (low power state) (Note 1)
Note 1. During suspend, VP and VM are active in order to detect out-of-band signaling conditions.
Table 1. Function Selection
OE# = 0: Input VP 0 0 1 1 OE# = 1: Input D+ 0 0 1 1
X - Undefined
Output VM 0 1 0 1 D+ 0 0 1 1 D- 0 1 0 1 Output D- 0 1 0 1 VP 0 0 1 1 VM 0 1 0 1 RCV X 0 1 X RCV X 0 1 X
Result SE0 Logic 0 Logic 1 Undefined
Result SE0 Logic 0 Logic 1 Undefined
Table 2. Truth Table During Normal Mode
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Absolute Maximum Ratings (Note 1)
Supply Voltage (VBUS) .................................................. 6.5V All Other Inputs ...............................................-0.5V to 5.5V Ambient Storage Temperature.................. -65C to +150C Output Current (D+, D-) .......................................... 50mA Output Current (all others) ........................................ 15mA Input Current ............................................................ 50mA ESD, Note 3 VBUS, D+, D- .........................................................15KV All other pins ............................................................2KV
Operating Ratings (Note 2)
Supply Voltage (VBUS) ...................................4.0V to 5.25V Ambient Operating Temperature ................ -40C to +85C Package Thermal Resistance MLF (JA) ...........................................................59(C/W)
DC Electrical Characteristics (System and USB Interface) (Note 6)
Symbol VBUS VIF VIL VIH VOH VOL IIL Symbol Parameter USB Supply Voltage System I/F Supply Voltage LOW-Level Input Voltage, Note 4 HIGH-Level Input Voltage, Note 4 HIGH-Level Output Voltage, Note 4 LOW-Level Output Voltage, Note 4 Input Leakage Current, Note 4 Parameter SPD 1 1 0 IIF VIF Supply Current 0 0 1 SUS 0 0 0 0 1 0 OE# 1 0 1 0 0 0 VBUS = 5.25V VIF = 3.6V f = 6MHz CLOAD = 50pF, Note 6 f = 750MHz CLOAD = 600pF, Note 6 Conditions Voltage Load IOH = 20A IOL = 20A Conditions
VIF = 3.6V, VBUS = 5V unless otherwise noted; TA = 25C. Bold indicates specifications over temperature, -40C to 85C. Min 4.0 1.6 VIF-0.3 0.85VIF 0.9VIF 0.1 -5 Min Typ 5 Max Typ Max 5.25 3.6 0.15VIF VIF+0.3 Units V V V V V V A Units
1
5
A
325
650
A
0 1 1 0 IVBUS VBUS Supply Current 0 0 1
0 0 0 0 0 1 0
0 1 0 1 0 0 0 VBUS = 5.25V VIF = 3.6V
40 800 3000 230 400 130
75 1100 5000 350 700 200 10
A A A A A A mA
f = 6MHz CLOAD = 50pF, Note 6 f = 750MHz CLOAD = 600pF, Note 6 Min -5 -5 3.0
7.3
0 Symbol IVPULEAK IVIFLEAK VPU RSW Parameter VPU Leakage Current VIF Leakage Current Pull-Up Output Voltage Internal Pull-Up Termination
0
0 Conditions CON = 1, VPU = 0V VIF = 3.6V, VBUS = 0V
3.6 Typ
5 Max 5 5
mA Units A A V
ITERM = 200A, VBUS = 4.0 to 5.25V ITERM = 10mA, VBUS = 4.0 to 5.25V
3.3 10
3.6
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Symbol Parameter Conditions 10 pulses 10 pulses Min Typ 15 15 Max ESD Protection IEC-1000-4-2 Air Discharge (D+, D-, VBUS Contact Discharge only) Leakage Current ILO Input Levels VDI VCM VSE Output Levels VOL VOH Capacitance CIN ZRDV Transceiver Capacitance Driver Output Resistance Pin to GND Steady-state drive 8 10 16 24 Static Output Low Static Output High RL = 1.5k to 3.6V RL = 1.5k to GND 2.8 0.3 3.6 Differential Input Sensitivity Differential Common Mode Range Single-Ended Receiver Threshold Receiver Hysteresis |(D+) - (D-)| Includes VDI range 0.2 0.8 0.8 200 2.5 2.0 Hi-Z State Data Line Leakage (Suspend Mode) 0V < VIN < 3.3V, SUS = 1 -10 10
Micrel, Inc.
Units kV kV
DC Electrical Characteristics (Transceiver) (Note 6)
A
V V V mV V V pF
AC Electrical Characteristics (Notes 5)
Driver Characteristics (Low Speed) TR TF TR, TF VCRS TR TF TR, TF VCRS tPVZ tPZD tPDZ tPZV tPLH tPHL tPLH tPHL tPLH tPHL Transition Rise Time Transition Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Transition Rise Time Transition Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage OE# to RCVR Tri-State Delay Receiver Tri-State to Transmit Delay OE# to DRVR Tri-State Delay Driver Tri-State to Receiver Delay VP, VM to D+, D- Propagation Delay D+, D- to RCV Propagation Delay D+, D- to VP, VM Propagation Delay Figure 1 Figure 1 Figure 1 Figure 1 Figure 4 Figure 3 Figure 3 15 15 15 8 15 15 CL = 50pF, Figure 2 CL = 50pF, Figure 2 (TR, TF) CL = 50pF, Figure 2 CL = 600pF CL = 50pF, Figure 2 CL = 600pF (TR, TF) 75 75 80 1.3 4 4 90 1.3 300 300 125 2.0 20 20 111.11 2.0 15 ns ns % V ns ns % V ns ns ns ns ns ns ns
Driver Characteristics (Full Speed)
Transceiver Timing
Note 1. Note 2. Note 3. Note 4. Note 5. Note 6.
Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF. Specification applies to the following pins: SUS, SPD, CON, RCV, VP, VM, OE#. All AC parameters guaranteed by design but not production tested. Specification for packaged product only.
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Micrel, Inc.
TRANSMIT OE# tPVZ VP/VM tPZD D+/D- tPDZ tPZV RECEIVE
Timing Diagrams
Figure 1. Enable and Disable Times
Rise Time Differential Data Lines
90% 10%
Fall Time
90% 10%
tR
tF
Figure 2. Rise and Fall Times
D+ D- VOH VOL VSS Differential Data Lines
VCRS tPLH
VCRS tPHL
Figure 3. Receiver Propagation Delay
VOH VOL D+ D- tPLH VCRS Differential Data Lines tPHL VCRS
Figure 4. Driver Propagation Delay
Test Circuits
D.U.T. 25pF
Figure 5. Load for VP, VM, RCV
VTRM
1.5k
D.U.T.
20 15k CL
Figure 6. Load for D+, D- 6 March 2006
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MIC2551A-2.5
Micrel, Inc.
Functional Diagram
To Internal Circuitry
LDO Regulator
VBUS VTERM VPU
VIF
CON SPD OE#
D+ D-
RCV
Level Translator
VP
VM
SUS
GND
MIC2551A
Applications Information
The MIC2551A is designed to provide USB connectivity in mobile systems where available system supply voltages are not able to satisfy USB requirements. The MIC2551A can operate interface supply voltages as low as 1.6V and still meet the USB physical layer specifications. As shown in the circuit above, the MIC2551A takes advantage of the USB supply voltage, VBUS, to operate the transceiver. The system voltage, VIF, is used to set the reference voltage used by the digital I/O lines interfacing to the system controller. Internal circuitry provides translation between the USB and system voltage domains. VIF will typically be the main supply voltage rail for the controller. In addition, a 3.3V, 10% termination supply voltage, (VPU), is provided to support speed selection. VPU can be disabled or enabled under software control via the CON input. This allows for software-controlled connect or disconnect states. A 1.5k resistor is required to be connected between this pin and the D+ or D- lines to respectively specify high speed or low speed operation.
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MIC2551A-2.5 Power Supply Configuration The MIC2551A can be set up for different power supply configurations which modify the behavior of the device. Both VBUS and VIF have special thresholds that detect when they are either removed or grounded. Table 1 depicts the behavior under the different power supply configuration scenarios that are explained below.
Normal Mode
Micrel, Inc. Signal Amplitude Respective to VIF When operating the MIC2551A, it is necessary to provide input signals which do not exceed VIF + 0.3V. Suspend When the suspend pin (SUS) is high, power consumption is reduced to a minimum. VTRM is not disabled. RCV, VP and VM are still functional to enable the device to detect USB activity. For minimal current consumption in suspend mode, it is recommended that OE# = 1, and SPD = 0. Speed The speed pin (SPD) sets D+/D- output edge rates by increasing or decreasing biasing current sources within the output drivers. For low speed, SPD = 0. For full speed, SPD = 1. By setting SPD = 0 during idle periods, in conjunction with suspend (SUS), the lowest quiescent current can be obtained. However, designers must provide a 300ns delay between changing SPD from 0 to 1 and transmission of data at full speed. This delay ensures the output drivers have arrived at their proper operating conditions. Failure to do so can result in leading edge distortion on the first few data bits transmitted. Non-Multiplexed Bus In order to save pin count for the USB logic controller interface, the MIC2551A was designed with VP and VM as bi-directional pins. To interface the MIC2551A with a non-multiplexed data bus, resistors can be used for low cost isolation, as shown in Figure 9.
USB Logic Controller (SIE)
VP VPO VM VMO
VBUS is connected to the 5.0V USB bus voltage and VIF is connected to a supply voltage in the range of 1.6V to 3.6V. In this case VTRM supplies a 3.3V voltage for powering the speed select resistor via VPU depending on the state of CON pin.
Disconnect Mode
VIF is connected to a supply in a range of 1.6V to 3.6V and VBUS is open or grounded. If VBUS is opened while transmitting, the data lines (D+, D-) have sharing capability and may be driven with external devices up to approximately 3.6V if and only if SUSPEND is enabled (SUS = 1). With VBUS ground, D+, D- sharing mode is not permitted.
Disable Mode
VBUS is connected to the 5.0V USB bus voltage and VIF is open. All logic controlled inputs become high impedances, thus minimal current will be supplied by VIF if the input pins are pulled up to an external source. Alternate Power Supply Configuration Options
I/O Interface Using 3.3V
In systems where the I/O interface utilizes a 3.3V USB controller, an alternate solution is shown in Figure 7. No extra components are required; however, the load on VTRM must not exceed 10mA.
3.3V MIC2551A VIF VBUS VBUS
MIC2551A 10k VP
VDD USB Controller
10k
VM
I/O
VP/VM/ VTRM RCV/OE#
Figure 9. MIC2551A Interface to Non-Multiplexed Data Bus
Figure 7. I/O Interface Using 3.3V
Bypass Input
VBUS and VTRM are tied together to a supply voltage in the range of 3.0V to 3.6V. The internal regulator is bypassed and the internal circuitry is run from the VTRM input. See Figure 8.
MIC2551A VIF VBUS 3.3V
VTRM
Figure 8. Powering MIC2551A from External 3.3V
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Configuration Mode Normal Disconnect (D+/Dsharing) VBUS/VTRM Connected Open VIF Connected Connected Notes Normal supply configuration and operation.
Micrel, Inc.
VP/VM are HIGH outputs, RCV is LOW. With OE# = 0 and SUS = 1, data lines may be driven with external devices up to 3.6V. With D+, D- floating, IIF draws less than 1A. VP/VM are HIGH outputs, RCV is LOW. With D+, D- floating, IIF draws less than 1A. Logic controlled input pins are Hi-Z. No communication is possible until interface voltage is restored. Inoperative
Disconnect Disable Mode Unpowered
Ground Connected Connected
Connected Open Ground
Table 1. Power Supply Configuration
PCB Layout Recommendations
Although the USB standard and applications are not based in an impedance-controlled environment, a properly designed PCB layout is recommended for optimal transceiver performance. The suggested PCB layout hints are as follows: * Match signal line traces (VP/VM, D+, D-) to 40ps, approximately one-third inch if possible. FR-4 PCB material propagation is about 150ps/ inch, so to minimize skew try to keep VP/VM, D+/D- traces as short as possible. * For every signal line trace width (w), separate the signal lines by 1.5 - 2 widths. Place all other traces at >2 widths from all signal line traces. * Maintain the same number of vias on each differential trace, keeping traces approximately at same separation distance along the line. * Control signal line impedances to 10%. * Keep RS as close to the IC as possible, with equal distance between RS and the IC for both D+ and D-.
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MIC2551A-2.5
Micrel, Inc.
Package Information
14-Pin MLFTM (ML)
MICREL INC.
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
2180 FORTUNE DRIVE
SAN JOSE, CA 95131
USA
This information furnished by Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Pr Micrel for any damages resulting from such use or sale. (c) 2005 Micrel Incorporated M9999-031306
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